HY5DU56422LT
Overview
The HY5DU56422D(L)T, HY5DU56822D(L)T and HY5DU561622D(L)T are a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. This Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.
- All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 2/2.5 (DDR200, 266, 333) and 3 (DDR400) supported Programmable burst length 2/4/8 with both sequential and interleave mode Internal four bank operations with single pulsed /RAS Auto refresh and self refresh suppor
